Educational Trainer

Experimental Coverage:
Features:
Bread Board : Unique solder-less large size, spring loaded breadboard consisting of two Terminal Strips with 1280 tie
points and 4 Distribution Strips with 100 tie points each, totaling to 1680 tie points. (Size : 112mm x
170mm approx)
Regulated DC Power Supply : +5V at 1 Amp, -5V at 500 mA, 3 to +15V at 500mA, and -3 to -15V at 500 mA.
Pulse Generator : 1 Hz to 1 MHz in 6 Steps. Variable in between steps
- Amplitude : 3-15V (CMOS), 5V (TTL)
- Duty Cycle : 50% TTL / CMOS Output
Pulsar Switches : 2 independent buffered bounce free manual pulser (useful for freezing the action of each stage of the
counter after every clock pulse)
Data Switches : 12 Nos. independent buffered logic level inputs to select High / Low TTL levels, each with a bi-color
LED to indicate high / low status and termination.
Logic Indicators : 12 Nos. independent buffered logic level indicators for High / Low status indication with bi-color LED
for digital outputs
Seven Segment Display : 2 Nos. BCD to Seven Segment Decoder / Driver IC with terminals
Logic Probe : Logic level indicator for TTL / CMOS
CMOS/TTL : Provided
Power : 230 V A 10%, 50 Hz
Components Provided : ICs-4001/1, 4049/1,4069/1, 7400/1, 7402/1, 7404/1, 7406/1, 7408/2, 7410/2, 7411/3, 7420/2,7432/3,
7474/2,7476/2,7486/1.Resistors-330E/1,1K/2, 1K8/1,,15K/1, 47K/1.1M/2, Capacitors- 0.01mF/1,
0.1mF/1, 0.22 mF/1,Crystal-32.768MHz/1.
Accessories : Mains cord, Operating and Experimental manual, Red & Black patch cords (2mm with Pin) 10 each,
Red & Black patch cord (Pin to Pin) 10 each. Wire 24/25 SWG. 1Meter each 5 Colour Instruction
manual : Strongly supported by detailed operating instructions.
01. Logic gates operation
02. To verify De-morgana s theorem with boolean logic equations
03. Binary to Gray code conversion
04. Gray code to Binary conversion
05. Binary to Excess-3 code conversion
06. Binary Adder and Subtractor
07. Binary Multiplier
08. EX-OR gate implementation
09. Application of EX-OR gate
10. Johnson Counter
11. To verify the dual nature of Logic Gates
12. Study of Flip-Flops RS, JK, D&T
13. Multiplexer and Demultiplexer
14. 4 Bit Binary up and down counter
15. Study of 8 to 3 Line Encoder
16. Study of 3 to 8 Line Decoder
17. Study of Shift Register (SIPO)
18. CMOS-TTL Interfacing
19. Study of Crystal oscillator
20. Study of pulse stretcher circuit